4046 pll datasheet
It is small, very easy to integrate into a circuit, generates a stable square wave which is what the switching mixers in many recent radios need , and can be quickly tuned by a microcontroller down to a single Hertz. It comes in several versions, but even the simplest one generates frequencies up to 160MHz, which is handy given that most radios divide the frequency by 4 before it is applied to the mixer. Two features of the Si570 that software-defined radios for amateur use do not need are the high frequency resolution something like a single Hertz in the Si570 and rapid frequency switching 10ms for large frequency changes, 0.1ms for small changes . We do not need these features because in a software-defined radio SDR , you can use coarse tuning of the center frequency and still receive any narrow-band signal within at least 24kHz of the center frequency using DSP. Also, because the fine tuning is down in DSP, the convenience we would loose if the center frequency switches slowly say in a second or two is not that terrible. Achieving fast frequency switching and high frequency resolution is difficult; Without going to such high frequency and then dividing down, it is difficult to achieve these goals. So here is the strategy: for a Softrock-class radio, we will use a phase-locked loop PLL that tunes using a resolution of 8kHz, say, and which might lock onto the frequency a little slowly. We will do this by dividing a crystal oscillator down to 8kHz, dividing a variable frequency oscillator by some integer so that it produces 8kHz when tuned to a desired frequency, and lock them. What I wanted to try is to generate the 8kHz reference and to divide the high-frequency output using a microcontroller. The MCU uses this crystal to generate an on-chip 32kHz signal that can drive the different peripherals on the chip. We can use the MCU’s timer to generate the 8kHz signal, but this would use up the single counter-timer on the MCU, which we need for the PLL’s programmable divider. It can’t generate an ouput signal directly, but it can invoke an interrupt service routine ISR. Because I used an ISR to generate the reference clock for the PLL, I can’t use interrupts for anything else. We feed the high frequency signal to the TACLK pin of the microcontoller, program the counter-timer to use this external signal as its driving clock, and we program the same counter-timer to output a PWM signal on an output pin. Resistors R1, R2 and capacitor C1 set the center frequency and range of the VCO. the one from Philips can go only up to 40MHz, and devices from some other manufacturers have even lower frequency limits. However, I think that the asynchronous timer of PICs can’t drive a PWM signal, which means that the divided clock will need to be produced by an ISR; but on PICs it should be possible to generate the reference signal using PWM.
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